YOKOGAWA UTAdvanced Series, User Manual

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10-6
IM 05P07A01-01EN
10.4 UM33A D Registers
Process Data Area
Some of the D registers represent multiple events such as errors and status depending
on combinations of bits in the register.
In the following tables, if an event indicated by a specific bit occurs, the state of that bit
changes to “1.”
If no event occurs, the state of that bit is “0.” Blank lines in each table indicate unused
bits.
Process Data (D2001 to D2100)

Bit Configuration of D2001: AD1.E (A/D converter error status 1)
Bit Symbol Event
0 ADERR PV input A/D converter error
1 to 4
5
RJCERR PV input RJC error
6 to 7
8
ADBO PV input burnout error
9 to 15

Bit Configuration of D2002: PV1.E_L1 (PV input error status)
Bit Symbol Event
0 PVBO_L1 PV input burnout error
1 to 3
4
PVPOVER_L1 PV input over-scale
5 PVMOVER_L1 PV input under-scale
6 to 15

D2003 to D2007
Register
No.
Description Range and meaning of value
D2003 PV_L1 Measurment value -5.0 to 105.0% of PV input range (EU)

Bit Configuration of D2011: ALM_L1 (Alarm-1 to alarm-8 status)
Bit Symbol Event
0 ALM1_L1 ‘1’ when Alarm 1 is ON; ‘0’ when OFF
1 ALM2_L1 ‘1’ when Alarm 2 is ON; ‘0’ when OFF
2 ALM3_L1 ‘1’ when Alarm 3 is ON; ‘0’ when OFF
3
4
ALM4_L1 ‘1’ when Alarm 4 is ON; ‘0’ when OFF
5 ALM5_L1 ‘1’ when Alarm 5 is ON; ‘0’ when OFF
6 ALM6_L1 ‘1’ when Alarm 6 is ON; ‘0’ when OFF
7
8
ALM7_L1 ‘1’ when Alarm 7 is ON; ‘0’ when OFF
9 ALM8_L1 ‘1’ when Alarm 8 is ON; ‘0’ when OFF
10 to 15