265
Timer and Counter Instructions
Section 3-6
Description
When the timer input is ON, TTIM(087)/TTIMX(555) increments the PV. When
the timer input goes OFF, the timer will stop incrementing the PV, but the PV
will retain its value. The PV will resume timing when the timer input goes ON
again. The timer’s Completion Flag will be turned ON when the PV reaches
the SV.
The status of the timer’s PV and Completion Flag will be maintained after the
timer times out. There are three ways to restart the timer: the timer’s PV can
be changed to a non-zero value (by MOV(021), for example), the reset input
can be turned ON, or CNR(545)/CNRX(547) can be executed.
Flags
Precautions
Timer numbers are shared with other timer instructions. If two timers share
the same timer number, but are not used simultaneously, a duplication error
will be generated when the program is checked, but the timers will operate
normally. Timers which share the same timer number will not operate properly
if they are used simultaneously.
Indirect DM/EM
addresses in BCD
---
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
BCD:
#0000 to 9999 (BCD)
“&” cannot be used.
Binary:
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
Data Registers
---
DR0 to DR15
Index Registers
---
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Area
N
S
SV
Timer input
Timer PV
Reset input
PV maintained.
Timing resumes.
Completion
Flag
Name
Label
Operation
Error Flag
ER
ON if N is indirectly addressed through an Index Register
but the address in the Index Register is not the address of
a timer Completion Flag or timer PV.
ON if in BCD mode and S does not contain BCD data.
OFF in all other cases.
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...