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269
Timer and Counter Instructions
Section 3-6
Description
TIML(542)/TIMLX(553) is a decrementing ON-delay timer with units of 0.1-s
that uses an 8-digit SV and an 8-digit PV.
When the timer input is OFF, the timer is reset, i.e., the timer’s PV is reset to
the SV and its Completion Flag is turned OFF.
When the timer input goes from OFF to ON, TIML(542)/TIMLX(553) starts
decrementing the PV in D2+1 and D2. The PV will continue timing down as
long as the timer input remains ON and the timer’s Completion Flag will be
turned ON when the PV reaches 0000 0000.
The status of the timer’s PV and Completion Flag will be maintained after the
timer times out. To restart the timer, the timer input must be turned OFF and
then ON again or the timer’s PV must be changed to a non-zero value (by
MOV(021), for example).
Flags
Precautions
Unlike most timers, TIML(542)/TIMLX(553) does not use a timer number.
(Timer area PV refreshing is not performed for TIML(542)/TIMLX(553).)
Since the Completion Flag for TIML(542)/TIMLX(553) is in a data area it can
be forced set or forced reset like other bits, but the PV will not change.
The timer’s PV is refreshed only when TIML(542)/TIMLX(553) is executed, so
the timer will not operate properly when the cycle time exceeds 100 ms
because the timer increments in 100-ms units.
The timer’s Completion Flag is refreshed only when TIML(542)/TIMLX(553) is
executed, so a delay of up to one cycle may be required for the Completion
Flag to be turned ON after the timer times out.
Constants
---
BCD:
#00000000 to
99999999 (BCD)
“&” cannot be
used.
Binary:
&00000000 to
&4294967294
(decimal) or
#00000000 to
#FFFFFFFF (hex)
Data Registers
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Area
D1
D2
S
SV
Timer input
Timer PV
Completion Flag
(Bit 00 of D1)
Name
Label
Operation
Error Flag
ER
ON if the PV contained in D2+1 and D2 is not BCD.
ON if the SV contained in S+1 and S is not BCD.
OFF in all other cases.
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...