![background image](http://html1.mh-extra.com/html/omron/sysmac-cs1d-cpu/sysmac-cs1d-cpu_reference-manual_742268445.webp)
406
Data Shift Instructions
Section 3-9
When the contents of the control word C are out of range, an error will be gen-
erated and the Error Flag will turn ON.
If as a result of the shift the contents of D is 0000 hex, the Equals Flag will
turn ON.
If as a result of the shift the contents of the leftmost bit of D is 1, the Negative
Flag will turn ON.
Examples
When CIO 000000 is ON, CIO 0100 will be shifted 10 bits to the right (from
the leftmost bit to the rightmost bit). The number of bits to shift is specified in
bits 0 to 7 of word CIO 0300. The contents of bit 15 of CIO 0100 is copied into
the bits from which data was shifted and the contents of the leftmost bit of
data which was shifted out of range, is shifted into the Carry Flag (CY). All
other data is lost.
3-9-24 DOUBLE SHIFT N-BITS RIGHT: NSRL(583)
Purpose
Shifts the specified 32 bits of word data to the right by the specified number of
bits.
Ladder Symbol
Variations
15
8
0
11
3
7
4
12
C
0
8
0
A
No. of bits to shift: 10 bits (0A Hex)
Always 0.
Data shifted into register
8 Hex: Contents of leftmost bit shifted in
No. of bits to shift: 10 bits
(Contents of the leftmost bit is
inserted.)
Lost
Leftmost bit
NSRL(583)
D
C
D
: Shift word
C
: Control word
Variations
Executed Each Cycle for ON Condition
NSRL(583)
Executed Once for Upward Differentiation
@NSRL(583)
Executed Once for Downward Differentiation
Not supported
Immediate Refreshing Specification
Not supported
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...