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190
Sequence Output Instructions
Section 3-4
If S and R are ON simultaneously, the reset input takes precedence.
The set input (S) cannot be received while R is ON.
KEEP(011) has an immediate refreshing variation (!KEEP(011)). When an
external output bit has been specified for B in a !KEEP(011) instruction, any
changes to B will be refreshed when !KEEP(011) is executed and reflected
immediately in the output bit. (The changes will not be reflected immediately if
the bit is allocated to a Group-2 High-density I/O Unit, High-density Special I/
O Unit, or a Unit mounted in a SYSMAC BUS Remote I/O Slave Rack.)
KEEP(011) operates like the self-maintaining bit, but a self-maintaining bit
programmed with KEEP(011) requires one less instruction.
Self-maintaining bits programmed with KEEP(011) will maintain status even in
an interlock program section, unlike the self-maintaining bit programmed with-
out KEEP(011).
ON
OFF
ON
OFF
ON
OFF
Status of C
S execution condition
R execution condition
Set
Reset
Status of C
Set
Reset
Status of C
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...