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964
Basic I/O Unit Instructions
Section 3-23
CPU Bus Unit:
8000 to 800F hex
(to specify unit numbers 0 to F hex)
S+1:
Number of words to transfer
(0001 to 0080 Hex, depends on Special I/O Unit or CPU Bus Unit)
Operand Specifications
Description
IORD(222) reads the number of words designated in S+1 from the memory
area of the Special I/O Unit or CPU Bus Unit whose unit number is designated
by S and outputs the data to D. Only Special I/O Units or CPU Bus Units
mounted on CPU Racks or Expansion I/O Racks can be designated. Refer to
the operation manual of the Special I/O Unit or CPU Bus Unit from which data
is being read for specific details for each Unit.
S+1
S
S+1: Leftmost 4 digits
S: Rightmost 4 digits
Area
C
S
D
CIO Area
CIO 0000 to CIO
6143
CIO 0000 to CIO
6142
CIO 0000 to CIO
6143
Work Area
W000 to W511
W000 to W510
W000 to W511
Holding Bit Area
H000 to H511
H000 to H510
H000 to H511
Auxiliary Bit Area
A000 to A959
A000 to A958
A448 to A959
Timer Area
T0000 to T4095
T0000 to T4094
T0000 to T4095
Counter Area
C0000 to C4095
C0000 to C4094
C0000 to C4095
DM Area
D00000 to
D32767
D00000 to
D32766
D00000 to
D32767
EM Area without bank
E00000 to
E32767
E00000 to
E32766
E00000 to
E32767
EM Area with bank
En_00000 to
En_32767
(n = 0 to C)
En_00000 to
En_32766
(n = 0 to C)
En_00000 to
En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
#0000 to #FFFF
(binary)
Specified values
only
---
Data Registers
DR0 to DR15
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...