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221
Sequence Control Instructions
Section 3-5
Timing Chart
Controlling Interlock Status from a Programming Device
An interlock can be engaged or released manually by force-resetting or force-
setting the Interlock Status Bit (specified with operand D of MILH(517) and
MILR(518)) from a Programming Device. The forced status of the Interlock
Status Bit has priority and overrides the interlock status calculated by program
execution.
Force-set: Releases the interlock.
Force-reset: Engages the interlock.
Note
Program operation can be switched more efficiently by using interlocks with
MILH(517) or MILR(518).
Instead of switching processing with compound conditions, insert an
MILH(517) or MILR(518) instruction before each process and an MILC(519)
instruction after each process.
ON
000000
000001
001000
OFF
OFF
ON
ON
OFF
ON
OFF
DIFU(013) is not executed.
MILR(518) interlock
Not interlocked
Interlocked
Not interlocked
MILC
n
OFF
MILH
n
010000
If CIO 010000 is force-set (ON), the interlock is released.
CIO 010000 is OFF when the interlock is engaged.
Program section
controlled by interlock
MILC
n
ON
MILH
n
010000
If CIO 010000 is force-reset (OFF), the interlock is engaged.
CIO 010000 is ON when the interlock is not engaged.
Program section
controlled by interlock
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...