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267
Timer and Counter Instructions
Section 3-6
If the timer input is turned OFF before the SV is reached, the timer will stop
timing but the PV will be maintained. The timer will resume from its previous
PV when the timer input is turned ON again.
3-6-7
LONG TIMER: TIML(542)/TIMLX(553)
Purpose
TIML(542)/TIMLX(553) operates a decrementing timer with units of 0.1 s that
can time up to 115 days for TIML(542) and 4,971 days for TIMLX(543). The
timer accuracy is 0 to 0.01 s.
Note
The timer accuracy for CS1D CPU Units is 10 ms + the cycle time
Ladder Symbol
BCD
Binary
Variations
CIO 000000
T0001
CIO 000001
#
T0001
#
Timer input
Timer PV
Timer Completion
Flag
Reset input
PV maintained.
Timing resumes.
or
TTIM
0001
#0100
000000
000001
TTIMX
0001
&0100
000000
000001
ON
OFF
0
ON
OFF
ON
OFF
#0100
ON
OFF
0
ON
OFF
ON
OFF
#0100
TIML(542)
D1
D2
S
D1
: Completion Flag
D2
: PV word
S
: SV word
TIMLX(543)
D1
D2
S
D1
: Completion Flag
D2
: PV word
S
: SV word
Variations
Executed Each Cycle for ON Condition
TIML(542)/
TIMLX(553)
Executed Once for Upward Differentiation
Not supported.
Executed Once for Downward Differentiation
Not supported.
Immediate Refreshing Specification
Not supported.
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...