![background image](http://html1.mh-extra.com/html/omron/sysmac-cs1d-cpu/sysmac-cs1d-cpu_reference-manual_742268339.webp)
300
Comparison Instructions
Section 3-7
S
2
through S
2
+2: Comparison Time Data
S
2
through S
2
+2 contain the comparison time data. S
2
through S
2
+2 must be
in the same data area.
Note
The year value indicates the last two digits of the year. Values 00 to 97 are
interpreted as 2000 to 2097. Values 98 and 99 are interpreted as 1998 and
1999.
Operand Specifications
15
8
0
7
S
2
15
8
0
7
S
2
+1
15
8
0
7
S
2
+2
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
Day: 01 to 31 (BCD)
Hour: 00 to 23 (BCD)
Minutes: 00 to 59 (BCD)
Seconds: 00 to 59 (BCD)
Area
C
S
1
S
2
CIO Area
CIO 0000 to
CIO 6143
CIO 0000 to CIO 6141
Work Area
W000 to W511
W000 to W509
Holding Bit Area
H000 to H511
H000 to H509
Auxiliary Bit Area
A448 to A959
A000 to A957
Timer Area
T0000 to T4095
T0000 to T4093
Counter Area
C0000 to C4095
C0000 to C4093
DM Area
D00000 to D32767 D00000 to D32765
EM Area without bank E00000 to E32767 E00000 to E32765
EM Area with bank
En_00000 to
En_32767
(n = 0 to C)
En_00000 to En_32765
(n = 0 to C)
Indirect DM/EM
addresses in binary
---
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
---
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...