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173
Sequence Input Instructions
Section 3-3
Description
AND LD connects in series the logic block just before this instruction with
another logic block.
The logic block consists of all the instructions from a LOAD or LOAD NOT
instruction until just before the next LOAD or LOAD NOT instruction on the
same rungs.
In the following diagram, the two logic blocks are indicated by dotted lines.
Studying this example shows that an ON execution condition will be produced
when either of the execution conditions in the left logic block is ON (i.e., when
either CIO 000000 or CIO 000001 is ON)
and
either of the execution condi-
tions in the right logic block is ON (i.e., when either CIO 000002 is ON or
CIO 000003 is OFF).
Flags
There are no flags affected by this instruction.
Precautions
Three or more logic blocks can be connected in series using this instruction to
first connect two of the logic blocks and then to connect the next and subse-
quent ones in order. It is also possible to continue placing this instruction after
three or more logic blocks and connect them together in series.
When a logic block is connected by AND LOAD or OR LOAD instructions, the
total number of AND LOAD/OR LOAD instructions must match the total num-
ber of LOAD/LOAD NOT instructions minus 1. If they do not match, a program
error will occur.
Example
Coding Example (1)
LD
LD
AND LD
Logic block A
Logic block B
Serial connection between logic block A and logic block B.
to
to
Instruction
Operand
LD
000000
OR NOT
000001
LD NOT
000002
OR
000003
AND LD
---
LD
000004
OR
000005
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...