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28
Instruction Functions
Section 2-2
DIFFERENTIATE
DOWN
DIFD
!DIFD
*1
014
Output
Required
193
SET
SET
@SET
%SET
!SET
*1
!@SET
*1
!%SET
*1
Output
Required
195
RESET
RSET
@RSET
%RSET
!RSET
*1
!@RSET
*1
!%RSET
*1
Output
Required
195
MULTIPLE BIT
SET
SETA
@SETA
530
Output
Required
198
MULTIPLE BIT
RESET
RSTA
@RSTA
531
Output
Required
198
SINGLE BIT SET
(CS1-H, CJ1-H,
CJ1M, or CS1D
only)
SETB
@SETB
!SETB
*1
!@SETB
*1
SETB(532) turns ON the specified bit in the specified word when the exe-
cution condition is ON.
Unlike the SET instruction, SETB(532) can be used to set a bit in a DM or
EM word.
Output
Required
201
Instruction
Mnemonic
Code
Symbol/Operand
Function
Location
Execution
condition
Page
DIFD(014)
B
B
:
Bit
Status of B
One cycle
DIFD(014) turns the designated bit ON for one cycle when the
execution condition goes from ON to OFF (falling edge).
Execution condition
SET
B
B
:
Bit
Status of B
SET turns the operand bit ON when the execution condition is ON.
Execution condition
of SET
RSET
B
B
:
Bit
Status of B
RSET turns the operand bit OFF when the execution condition is ON.
Execution condition
of RSET
SETA(530)
D
N1
N2
D
:
Beginning
word
N1
:
Beginning bit
N2
:
Number of
bits
SETA(530) turns ON the specified number of consecutive bits.
N2 bits are set to 1
(ON).
RSTA(531)
D
N1
N2
D
:
Beginning
word
N1
:
Beginning bit
N2
:
Number of
bits
N2 bits are reset to
0 (OFF).
RSTA(531) turns OFF the specified number of consecutive bits.
SETB(532)
D
N
D
: Word address
N
: Bit number
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...