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229
Sequence Control Instructions
Section 3-5
Applicable Program Areas
Operands
N: Jump Number
The jump number must be 0000 to 03FF (&0 to &1,023 decimal).
Note
For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the jump number must be
between the range 0000 to 00FF hex or &0 to &255 decimal.
Operand Specifications
Note
For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is #0000 to #00FF
(binary) or &0 to &1023 (decimal).
Description
When the execution condition for JMP(004) is ON, no jump is made and the
program is executed consecutively as written.
When the execution condition for JMP(004) is OFF, program execution jumps
directly to the first JME(005) in the program with the same jump number. The
instructions between JMP(004) and JME(005) are not executed, so the status
of outputs between JMP(004) and JME(005) is maintained. In block programs,
Variations
Executed Each Cycle for ON Condition
JME(005)
Immediate Refreshing Specification
Not supported
Block program areas
Step program areas
Subroutines
Interrupt tasks
OK
Not allowed
OK
OK
Area
N
JMP(004)
JME(005)
CIO Area
CIO 0000 to CIO 6143
---
Work Area
W000 to W511
---
Holding Bit Area
H000 to H511
---
Auxiliary Bit Area
A000 to A959
---
Timer Area
T0000 to T4095
---
Counter Area
C0000 to C4095
---
DM Area
D00000 to D32767
---
EM Area without bank
E00000 to E32767
---
EM Area with bank
En_00000 to En_32767
(n = 0 to C)
---
Indirect DM/EM addresses
in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to
@ En_32767
(n = 0 to C)
---
Indirect DM/EM addresses
in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
---
Constants
#0000 to #03FF (binary) or
&0 to &1023 (See note.)
#0000 to #03FF (binary) or
&0 to &1023 (See note.)
Data Registers
DR0 to DR15
---
Index Registers
---
---
Indirect addressing using
Index Registers
,IR0 to ,IR15
–2048 to +2047, IR0 to
–2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
---
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...