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266
Timer and Counter Instructions
Section 3-6
Timers will be reset or paused in the following cases. (When a TTIM(087)/
TTIMX(555) timer is reset, its PV is reset to 0000 and its Completion Flag is
turned OFF.)
Note
1.
If the IOM Hold Bit (A50012) has been turned ON, the status of timer Com-
pletion Flags and PVs will be maintained when the operating mode is
changed.
2.
If the IOM Hold Bit (A50012) has been turned ON and the status of the IOM
Hold Bit itself is protected in the PLC Setup, the status of timer Completion
Flags and PVs will be maintained even when the power is interrupted.
3.
The PV will be set to the SV when TTIM(087)/TTIMX(555) is executed.
When TTIM(087)/TTIMX(555) is in a program section between IL(002) and
ILC(003) and the program section is interlocked, the PV will retain its previous
value (it will not be reset). Be sure to take this fact into account when
TTIM(087)/TTIMX(555) is programmed between IL(002) and ILC(003).
When an operating TTIM(087)/TTIMX(555) timer is in a program section
between JMP(004) and JME(005) and the program section is jumped, the PV
will retain its previous value. Be sure to take this fact into account when
TTIM(087)/TTIMX(555) is programmed between JMP(004) and JME(005).
When a TTIM(087)/TTIMX(555) timer is forced set, its Completion Flag will be
turned ON and its PV will be reset to 0000. When a TTIM(087)/TTIMX(555)
timer is forced reset, its Completion Flag will be turned OFF and its PV will be
reset to 0000. The forced set and forced reset operations take priority over the
status of the timer and reset inputs.
The timer’s PV is refreshed only when TTIM(087)/TTIMX(555) is executed, so
the timer will not operate properly when the cycle time exceeds 100 ms
because the timer increments in 100-ms units.
The timer’s Completion Flag is refreshed only when TTIM(087)/TTIMX(555) is
executed, so a delay of up to one cycle may be required for the Completion
Flag to be turned ON after the timer times out.
Typical timers such as TIM/TIMX(550) are decrementing counters and the PV
shows the time remaining until the timer times out. The PV of TTIM(087)/
TTIMX(555) shows how much time has elapsed, so the PV can be used
unchanged in many calculations and display outputs.
Example
When timer input CIO 000000 is ON in the following example, the timer PV
will begin counting up from 0. Timer Completion Flag T0001 will be turned ON
when the PV reaches the SV.
If the reset input is turned ON, the timer PV will be reset to 0000 and the Com-
pletion Flag (T0001) will be turned OFF. (Usually the reset input is turned ON
to reset the timer and then the timer input is turned ON to start timing.)
Condition
PV
Completion Flag
Operating mode changed from RUN or
MONITOR mode to PROGRAM mode or
vice versa.
1
0000
OFF
Power supply interrupted and reset
2
0000
OFF
Execution of CNR(545)/CNRX(547), the
RESET TIMER/COUNTER instructions
3
BCD: 9999
Binary: FFFF
OFF
Operation in interlocked program section
(IL(002)–ILC(003))
Retains previ-
ous status.
Retains previous status.
Operation in jumped program section
(JMP(004)–JME(005))
Retains previ-
ous status.
Retains previous status.
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...