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202
Sequence Output Instructions
Section 3-4
Operand Specifications
Description
The functions of SETB(532) and RSTB(533) are described separately below.
Operation of SETB(532)
SETB(532) turns ON bit N of word D when the execution condition is ON. The
status of the bit is not affected when the execution condition is OFF. Unlike
SET, SETB(532) can turn ON a bit in the DM area or EM area.
Bits turned ON by SETB(532) can be turned OFF by any other instruction, not
just RSTB(533).
SETB(532) is supported by CS1-H, CJ1-H, and CJ1M CPU Units only.
Area
D
N
CIO Area
CIO 0000 to CIO 6143
Work Area
W000 to W511
Holding Bit Area
H000 to H511
Auxiliary Bit Area
A448 to A959
A000 to A959
Timer Area
T0000 to T4095
Counter Area
C0000 to C4095
DM Area
D00000 to D32767
EM Area without bank
E00000 to E32767
EM Area with bank
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM addresses in
binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM addresses in
BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
#0000 to #000F (binary)
or &0 to &15
Data Registers
DR0 to DR15
Index Registers
---
Indirect addressing using
Index Registers
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
ON
OFF
ON
OFF
15
This bit is turned ON.
Execution condition
Bit N of word D
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...