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1104
File Memory Instructions
Section 3-26
Operand Specifications
CPU Unit
File specified
in S2
Number of
words
Number of words
written to D and D+1.
Memory Card or EM file memory
(Specified by the 1st digit of C.)
Area
C
S1
S2
D
CIO Area
CIO 0000 to
CIO6143
CIO 0000 to
CIO 6140
CIO 0000 to CIO 6143
Work Area
W000 to
W511
W000 to
W508
W000 to W511
Holding Bit Area
H000 to H511
H000 to 508
H000 to W511
Auxiliary Bit Area
A000 to A959
A000 to A444
A448 to A956
A000 to A447
A448 to A959
A448 to A959
Timer Area
T0000 to
T4095
T0000 to
T4092
T0000 to T4095
Counter Area
C0000 to
C4095
C0000 to
C4092
C0000 to C4095
DM Area
D00000 to
D32767
D00000 to
D32764
D00000 to D32767
EM Area without
bank
E00000 to
E32767
E00000 to
E32764
E00000 to E32767
EM Area with bank
En_00000 to
En_32767
(n = 0 to C)
En_00000 to
En_32764
(n = 0 to C)
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
–
@D00000 to @D32767
@E00000 to @E32767
@En_00000 to @En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
–
*
D00000 to *D32767
*
E00000 to *E32767
*
En_00000 to *En_32767
(n = 0 to C)
Constants
Specified val-
ues only
–
Data Registers
–
Index Registers
–
Indirect addressing
using Index Regis-
ters
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Summary of Contents for SYSMAC CS1D-CPU**
Page 3: ...iv...
Page 29: ...xxx...
Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...