216
Sequence Control Instructions
Section 3-5
The MILH(517)/MILR(518) instruction turns OFF the Interlock Status Bit
(operand D) when the interlock is in engaged and turns ON the bit when the
interlock is not engaged. Consequently, the Interlock Status Bit can be moni-
tored to check whether or not the interlock for a given interlock number is
engaged.
Nesting
Interlocks are nested when an interlocked program section (MILH(517)/
MILR(518) and MILC(519) combination) is placed within another interlocked
program section (MILH(517)/MILR(518) and MILC(519) combination). Inter-
locks can be nested up to 16 levels.
Nesting can be used for the following kinds of applications.
• Example 1
Interlocking the entire program with one condition and interlocking a part
of the program with another condition (1 nesting level)
• A1 and A2 are interlocked when the Emergency Stop Button is ON.
• A2 is interlocked when Conveyor RUN is OFF.
MILH
n
d
MILC
n
Input condition
Interlocked program
section
Input condition ON
(Normal operation)
Input condition OFF
Normal
operation
Interlock
Status Bit
(d) ON
Outputs interlocked.
(Outputs OFF,
timers reset, etc.)
Interlock Status Bit
(d) OFF
Global interlock
(Emergency stop)
A1 (Peripheral processing)
Partial interlock
(Conveyor RUN)
A2 (Conveyor operation)
Summary of Contents for SYSMAC CS1D-CPU**
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Page 185: ...146 List of Instructions by Function Code Section 2 4...
Page 1389: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2...
Page 1390: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits...
Page 1391: ...1352 ASCII Code Table Appendix A...