Signal
multiplexing
Module signals
Register
access
FlexTimer
Peripheral bus
controller 0
Other peripherals
Transfers
Figure 3-36. FlexTimer configuration
Table 3-53. Reference links to related information
Topic
Related module
Reference
Full description
FlexTimer
System memory map
Clocking
Power management
Signal multiplexing
Port control
3.8.2.1 Instantiation Information
This device contains three FlexTimer modules.
The following table shows how these modules are configured.
Table 3-54. FTM Instantiations
FTM instance
Number of channels
Features/usage
FTM0
8
3-phase motor + 2 general purpose or
stepper motor
FTM1
2
Quadrature decoder or general purpose
FTM2
2
Quadrature decoder or general purpose
1. Only channels 0 and 1 are available.
3.8.2.2 External Clock Options
By default each FTM is clocked by the internal bus clock (the FTM refers to it as system
clock). Each module contains a register setting that allows the module to be clocked from
an external clock instead. There are two external FTM_CLKINx pins that can be selected
by any FTM module via the SIM_SOPT4 register.
Chapter 3 Chip Configuration
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
109