PDBx_SC field descriptions (continued)
Field
Description
7
PDBEN
PDB Enable
0
PDB disabled. Counter is off.
1
PDB enabled.
6
PDBIF
PDB Interrupt Flag
This field is set when the counter value is equal to the IDLY register. Writing zero clears this field.
5
PDBIE
PDB Interrupt Enable
Enables the PDB interrupt. When this field is set and DMAEN is cleared, PDBIF generates a PDB
interrupt.
0
PDB interrupt disabled.
1
PDB interrupt enabled.
4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3–2
MULT
Multiplication Factor Select for Prescaler
Selects the multiplication factor of the prescaler divider for the counter clock.
00
Multiplication factor is 1.
01
Multiplication factor is 10.
10
Multiplication factor is 20.
11
Multiplication factor is 40.
1
CONT
Continuous Mode Enable
Enables the PDB operation in Continuous mode.
0
PDB operation in One-Shot mode
1
PDB operation in Continuous mode
0
LDOK
Load OK
Writing 1 to this bit updates the internal registers of MOD, IDLY, CHnDLYm, DACINTx,and POyDLY with
the values written to their buffers. The MOD, IDLY, CHnDLYm, DACINTx, and POyDLY will take effect
according to the LDMOD.
After 1 is written to the LDOK field, the values in the buffers of above registers are not effective and the
buffers cannot be written until the values in buffers are loaded into their internal registers.
LDOK can be written only when PDBEN is set or it can be written at the same time with PDBEN being
written to 1. It is automatically cleared when the values in buffers are loaded into the internal registers or
the PDBEN is cleared. Writing 0 to it has no effect.
37.3.2 Modulus register (PDBx_MOD)
Address: 4003_6000h base + 4h offset = 4003_6004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Chapter 37 Programmable Delay Block (PDB)
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
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