UARTx_MA1 field descriptions
Field
Description
7–0
MA
Match Address
46.3.10 UART Match Address Registers 2 (UARTx_MA2)
These registers can be read and written at anytime. The MA1 and MA2 registers are
compared to input data addresses when the most significant bit is set and the associated
C4[MAEN] field is set. If a match occurs, the following data is transferred to the data
register. If a match fails, the following data is discarded.
Address: Base a 9h offset
Bit
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
UARTx_MA2 field descriptions
Field
Description
7–0
MA
Match Address
46.3.11 UART Control Register 4 (UARTx_C4)
Address: Base a Ah offset
Bit
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
UARTx_C4 field descriptions
Field
Description
7
MAEN1
Match Address Mode Enable 1
See
for more information.
0
All data received is transferred to the data buffer if MAEN2 is cleared.
1
All data received with the most significant bit cleared, is discarded. All data received with the most
significant bit set, is compared with contents of MA1 register. If no match occurs, the data is
discarded. If match occurs, data is transferred to the data buffer. This field must be cleared when
C7816[ISO7816E] is set/enabled.
6
MAEN2
Match Address Mode Enable 2
See
for more information.
Table continues on the next page...
Chapter 46 Universal Asynchronous Receiver/Transmitter (UART)
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
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