1. This part number is subject to removal.
3.5.3.2 SRAM retention in low power modes
The SRAM is retained down to LLS3 and VLLS3 mode.
In LLS2 and VLLS2 the 16 KB region of SRAM_U from 0x2000_0000 is powered.
In VLLS1 and VLLS0 no SRAM is retained; however, the
is
available.
3.5.4 System Register File Configuration
This section summarizes how the module has been configured in the chip.
Register file
Peripheral
bridge 0
Register
access
Figure 3-23. System Register file configuration
Table 3-34. Reference links to related information
Topic
Related module
Reference
Full description
Register file
System memory map
Clocking
Power management
3.5.4.1 System Register file
This device includes a 32-byte register file that is powered in all power modes. The
System Register file is made up of eight 4-byte registers RFSYS_REGn, where n ranges
from 0 to 7.
Chapter 3 Chip Configuration
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
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