SIM_SCGC5 field descriptions (continued)
Field
Description
0
Clock disabled
1
Clock enabled
9
PORTA
Port A Clock Gate Control
This bit controls the clock gate to the Port A module.
0
Clock disabled
1
Clock enabled
8–7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 1.
6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3–2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
1
Reserved
This field is reserved.
This read-only field is reserved and always has the value 1.
0
LPTMR
Low Power Timer Access Control
This bit controls software access to the Low Power Timer module.
0
Access disabled
1
Access enabled
12.2.11 System Clock Gating Control Register 6 (SIM_SCGC6)
Address: 4004_7000h base + 103Ch offset = 4004_803Ch
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
W
Reset
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Chapter 12 System Integration Module (SIM)
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
267
