Freescale Semiconductor MK22FN256VDC12, Reference Manual

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The resulting conversion time is generated using the parameters listed in the preceding
table. Therefore, for bus clock equal to 8 MHz and ADCK equal to 1 MHz, the resulting
conversion time is 57.625 µs, that is, AverageNum. This results in a total conversion time
of 1.844 ms.
33.4.4.6.3 Short conversion time configuration
A configuration for short ADC conversion is:
• 8-bit Single-Ended mode with the bus clock selected as the input clock source
• The input clock divide-by-1 ratio selected
• Bus frequency of 20 MHz
• Long sample time disabled
• High-speed conversion enabled
The conversion time for this conversion is calculated by using the Figure 33-92 , and the
information provided in Table 33-104 through Table 33-108 . The table below lists the
variables of Figure 33-92 .
Table 33-111. Typical conversion time
Variable Time
SFCAdder 5 ADCK 5 bus clock cycles
AverageNum 1
BCT 17 ADCK cycles
LSTAdder 0 ADCK cycles
HSCAdder 2
The resulting conversion time is generated using the parameters listed in in the preceding
table. Therefore, for bus clock and ADCK frequency equal to 20 MHz, the resulting
conversion time is 1.45 µs.
33.4.4.7 Hardware average function
The hardware average function can be enabled by setting SC3[AVGE]=1 to perform a
hardware average of multiple conversions. The number of conversions is determined by
the AVGS[1:0] bits, which can select 4, 8, 16, or 32 conversions to be averaged. While
the hardware average function is in progress, SC2[ADACT] will be set.
After the selected input is sampled and converted, the result is placed in an accumulator
from which an average is calculated once the selected number of conversions have been
completed. When hardware averaging is selected, the completion of a single conversion
will not set SC1n[COCO].
Chapter 33 Analog-to-Digital Converter (ADC)
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc. 727