46.3.16 UART FIFO Parameters (UARTx_PFIFO)
This register provides the ability for the programmer to turn on and off FIFO
functionality. It also provides the size of the FIFO that has been implemented. This
register may be read at any time. This register must be written only when C2[RE] and
C2[TE] are cleared/not set and when the data buffer/FIFO is empty.
Address: Base a 10h offset
Bit
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
* Notes:
TXFIFOSIZE field: The reset value depends on whether the specific UART instance supports the FIFO and on the size of
that FIFO. See the Chip Configuration details for more information on the FIFO size supported for each
UART instance.
•
RXFIFOSIZE field: The reset value depends on whether the specific UART instance supports the FIFO and on the size of
that FIFO. See the Chip Configuration details for more information on the FIFO size supported for each
UART instance.
•
UARTx_PFIFO field descriptions
Field
Description
7
TXFE
Transmit FIFO Enable
When this field is set, the built in FIFO structure for the transmit buffer is enabled. The size of the FIFO
structure is indicated by TXFIFOSIZE. If this field is not set, the transmit buffer operates as a FIFO of
depth one dataword regardless of the value in TXFIFOSIZE. Both C2[TE] and C2[RE] must be cleared
prior to changing this field. Additionally, TXFLUSH and RXFLUSH commands must be issued immediately
after changing this field.
0
Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support).
1
Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.
6–4
TXFIFOSIZE
Transmit FIFO. Buffer Depth
The maximum number of transmit datawords that can be stored in the transmit buffer. This field is read
only.
000
Transmit FIFO/Buffer depth = 1 dataword.
001
Transmit FIFO/Buffer depth = 4 datawords.
010
Transmit FIFO/Buffer depth = 8 datawords.
011
Transmit FIFO/Buffer depth = 16 datawords.
100
Transmit FIFO/Buffer depth = 32 datawords.
101
Transmit FIFO/Buffer depth = 64 datawords.
110
Transmit FIFO/Buffer depth = 128 datawords.
111
Reserved.
3
RXFE
Receive FIFO Enable
Table continues on the next page...
Memory map and registers
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
1156
Freescale Semiconductor, Inc.