GHAS H
AUTHDAT
+
GF128Mult(H)
GHAS H
Plain text Processing
•
Set CTRLB.NEWMSG for the new set of plain text processing.
•
Load CIPLEN reg.
•
Load (J0+1) in INTVECTx register.
•
As described in NIST documentation J 0 = IV || 0 31 || 1 when len(IV)=96 and J0 =GHASH
H
(IV || 0
s+64 || [len(IV)] 64 ) (s is the minimum numer of zeroes that should be padded with the Initialization
Vector to make it a multiple of 128) if len(IV) != 96.
•
Load plain text in DATA register.
•
Set CTRLB.START as 1.
•
Wait for INTFLAG.ENCCMP to be set.
•
AES Hardware generates output in DATA register.
•
Intermediate GHASH is stored in GHASHx register and Cipher Text available in DATA register.
•
Continue 3 to 6 till the input of plain text to get the cipher text and the Hash keys.
•
At the last input, set CTRLB.EOM.
•
Write last indata to DATA reg.
•
Set CTRLB.START as 1.
•
Wait for INTFLAG.ENCCMP to be set.
•
AES Hardware generates output in DATA register and final Hash key in GHASHx register.
•
Load [LEN(A)]64||[LEN(C)]64 in DATA register and set CTRLB.GFMUL and CTRLB.START as 1.
•
Wait for INTFLAG.GFMCMP to be set.
•
AES Hardware generates final GHASH value in GHASHx register.
Plain text processing with DMAC
•
Set CTRLB.NEWMSG for the new set of plain text processing.
•
Load CIPLEN reg.
•
Load (J0+1) in INTVECTx register.
•
Load plain text in DATA register.
•
Wait for INTFLAG.ENCCMP to be set.
•
AES Hardware generates output in DATA register.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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