17.6.4. Interrupts
The peripheral has the following interrupt sources:
•
Clock Ready (CKRDY): indicates that CPU and BUP clocks are ready. This interrupt is a
synchronous wake-up source.
Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status
and Clear (
) register is set when the interrupt condition occurs. Each interrupt can be enabled
individually by writing a '1' to the corresponding enabling bit in the Interrupt Enable Set (
register, and disabled by writing a '1' to the corresponding clearing bit in the Interrupt Enable Clear
(
An interrupt request is generated when the interrupt flag is set and the corresponding interrupt is enabled.
The interrupt request remains active until the interrupt flag is cleared, the interrupt is disabled or the
peripheral is reset. An interrupt flag is cleared by writing a '1' to the corresponding bit in the
register. Each peripheral can have one interrupt request line per interrupt source or one common interrupt
request line for all the interrupt sources.If the peripheral has one common interrupt request line for all the
interrupt sources, the user must read the
register to determine which interrupt condition is
present.
Related Links
on page 191
17.6.5. Events
Not applicable.
17.6.6. Sleep Mode Operation
In IDLE sleep mode, the MCLK is still running on the selected main clock.
In STANDBY sleep mode, the MCLK is frozen if no synchronous clock is required.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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