43.8.14. LCD Pin Enable Low
Name:
LPENL
Offset:
0x1C
Reset:
0x00000000
Property:
PAC Write-Protection, Enable-Protected
Bit
31
30
29
28
27
26
25
24
LPEN[31:24]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
LPEN[23:16]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
LPEN[15:8]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
LPEN[7:0]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bits 31:0 – LPEN[31:0]: LCD Pin Enable
Each bit enables the corresponding LCD pin, from LP0 to LP31.
Value
Description
0
LCD pin is disabled.
1
LCD pin is enabled.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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