Atmel ATSAML22G16A-AUT, Manual

Page: 702 / 1231

34.8.1. Control A
Name: CTRLA
Offset: 0x00
Reset: 0x00000000
Property:
PAC Write-Protection, Enable-Protected, Write-Synchronized
Bit 31 30 29 28 27 26 25 24
LOWTOUT SCLSM SPEED[1:0]
Access R/W R/W R/W R/W
Reset 0 0 0 0
Bit 23 22 21 20 19 18 17 16
SEXTTOEN SDAHOLD[1:0] PINOUT
Access R/W R/W R/W R/W
Reset 0 0 0 0
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
RUNSTDBY
MODE[2:0] ENABLE SWRST
Access R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 30 – LOWTOUT: SCL Low Time-Out
This bit enables the SCL low time-out. If SCL is held low for 25ms-35ms, the slave will release its clock
hold, if enabled, and reset the internal state machine. Any interrupt flags set at the time of time-out will
remain set.
Value Description
0 Time-out disabled.
1 Time-out enabled.
Bit 27 – SCLSM: SCL Clock Stretch Mode
This bit controls when SCL will be stretched for software interaction.
This bit is not synchronized.
Value Description
0 SCL stretch according to Figure 34-9
1 SCL stretch only after ACK bit according to Figure 34-10
Bits 25:24 – SPEED[1:0]: Transfer Speed
These bits define bus speed.
These bits are not synchronized.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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