23.5.1. I/O Lines
I/O lines are configured by SUPC either when the SUPC output (signal OUT) is enabled or when the
PSOK input is enabled. The I/O lines need no user configuration.
23.5.2. Power Management
The SUPC can operate in all sleep modes except backup sleep mode. BOD33 and Battery backup Power
Switch can operate in backup mode.
Related Links
23.5.3. Clocks
The SUPC bus clock (CLK_SUPC_APB) can be enabled and disabled in the Main Clock module.
A 32KHz clock, asynchronous to the user interface clock (CLK_SUPC_APB), is required to run BOD33
and BOD12 in sampled mode. Due to this asynchronicity, writing to certain registers will require
synchronization between the clock domains. Refer to
for further details.
Related Links
OSC32KCTRL – 32KHz Oscillators Controller
on page 258
on page 145
23.5.4. DMA
Not applicable.
23.5.5. Interrupts
The interrupt request lines are connected to the interrupt controller. Using the SUPC interrupts requires
the interrupt controller to be configured first.
Related Links
Nested Vector Interrupt Controller
on page 44
23.5.6. Events
Not applicable.
23.5.7. Debug Operation
When the CPU is halted in debug mode, the SUPC continues normal operation. If the SUPC is configured
in a way that requires it to be periodically serviced by the CPU through interrupts or similar, improper
operation or data loss may result during debugging.
If debugger cold-plugging is detected by the system, BOD33 and BOD12 resets will be masked. The BOD
resets keep running under hot-plugging. This allows to correct a BOD33 user level too high for the
available supply.
23.5.8. Register Access Protection
Registers with write-access can be write-protected optionally by the peripheral access controller (PAC).
Note:
Not all registers with write-access can be write-protected.
PAC Write-Protection is not available for the following registers:
•
Interrupt Flag Status and Clear register (INTFLAG)
Optional PAC Write-Protection is denoted by the "PAC Write-Protection" property in each individual
register description.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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