The flag will only be set when using a synchronous or resynchronized paths. In the case of asynchronous
path, the INTFLAG.EVDn is always zero.
30.6.2.11. Channel Status
The Channel Status register (CHSTATUS) shows the status of the channels when using a synchronous or
resynchronized path. There are two different status bits in CHSTATUS for each of the available channels:
•
The CHSTATUS.CHBUSYn bit will be set when an event on the corresponding channel n has not
been handled by all event users connected to that channel.
•
The CHSTATUS.USRRDYn bit will be set when all event users connected to the corresponding
channel are ready to handle incoming events on that channel.
30.6.2.12. Software Event
A software event can be initiated on a channel by setting the Channel n bit in the Software Event register
(SWEVT.CHANNELn) to ‘1’. Then the software event can be serviced as any event generator; i.e., when
the bit is set to ‘1’, an event will be generated on the respective channel.
30.6.3. Interrupts
The EVSYS has the following interrupt sources:
•
Overrun Channel n interrupt (OVRn): for details, refer to
The Overrun Channel n Interrupt
.
•
Event Detected Channel n interrupt (EVDn): for details, refer to
These interrupts events are asynchronous wake-up sources. See
Sleep Mode Controller
. Each interrupt
source has an interrupt flag which is in the Interrupt Flag Status and Clear (INTFLAG) register. The flag is
set when the interrupt is issued. Each interrupt event can be individually enabled by setting a ‘1’ to the
corresponding bit in the Interrupt Enable Set (INTENSET) register, and disabled by setting a ‘1’ to the
corresponding bit in the Interrupt Enable Clear (INTENCLR) register. An interrupt event is generated
when the interrupt flag is set and the corresponding interrupt is enabled. The interrupt event works until
the interrupt flag is cleared, the interrupt is disabled, or the Event System is reset. See
for
details on how to clear interrupt flags.
All interrupt events from the peripheral are ORed together on system level to generate one combined
interrupt request to the NVIC. Refer to the
Nested Vector Interrupt Controller
for details. The event user
must read the INTFLAG register to determine what the interrupt condition is.
Note that interrupts must be globally enabled for interrupt requests to be generated. Refer to
Nested
Vector Interrupt Controller
for details.
Related Links
Nested Vector Interrupt Controller
on page 44
on page 191
30.6.4. Sleep Mode Operation
The EVSYS can generate interrupts to wake up the device from any sleep mode.
To be able to run in standby, the Run in Standby bit in the Channel register (CHANNELn.RUNSTDBY)
must be set to ‘1’. When the Generic Clock On Demand bit in Channel register
(CHANNELn.ONDEMAND) is set to ‘1’ and the event generator is detected, the event channel will
request its clock (GCLK_EVSYS_CHANNEL_n). The event latency for a resynchronized channel path will
increase by two GCLK_EVSYS_CHANNEL_n clock (i.e., up to five GCLK_EVSYS_CHANNEL_n clock
cycles).
A channel will behave differently in different sleep modes regarding to CHANNELn.RUNSTDBY and
CHANNELn.ONDEMAND, as shown in the table below:
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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