36.8.19. Pattern Buffer
Name:
PATTBUF
Offset:
0x64
Reset:
0x0000
Property:
Write-Synchronized, Read-Synchronized
Bit
15
14
13
12
11
10
9
8
PGVB7
PGVB6
PGVB5
PGVB4
PGVB3
PGVB2
PGVB1
PGVB0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
PGEB7
PGEB6
PGEB5
PGEB4
PGEB3
PGEB2
PGEB1
PGEB0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 8, 9, 10, 11, 12, 13, 14, 15 – PGVBn: Pattern Generation Output Value Buffer
This register is the buffer for the PGV register. If double buffering is used, valid content in this register is
copied to the PGV register on an UPDATE condition.
Bits 0, 1, 2, 3, 4, 5, 6, 7 – PGEBn: Pattern Generation Output Enable Buffer
This register is the buffer of the PGE register. If double buffering is used, valid content in this register is
copied into the PGE register at an UPDATE condition.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
872
