Atmel ATSAML22G16A-AUT, Manual

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Offset Name Bit Pos.
0x28
SEQCTRL
7:0 SEQEN7 SEQEN6 SEQEN5 SEQEN4 SEQEN3 SEQEN2 SEQEN1 SEQEN0
0x29 15:8 SEQEN15 SEQEN14 SEQEN13 SEQEN12 SEQEN11 SEQEN10 SEQEN9 SEQEN8
0x2A 23:16 SEQEN23 SEQEN22 SEQEN21 SEQEN20 SEQEN19 SEQEN18 SEQEN17 SEQEN16
0x2B 31:24 SEQEN31 SEQEN30 SEQEN29 SEQEN28 SEQEN27 SEQEN26 SEQEN25 SEQEN24
0x2C
CALIB
7:0 BIASCOMP[2:0]
0x2D 15:8 BIASREFBUF[2:0]
41.8. Register Description
Registers can be 8, 16, or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the
8-bit quarters and 16-bit halves of a 32-bit register, and the 8-bit halves of a 16-bit register can be
accessed directly.
Some registers are optionally write-protected by the Peripheral Access Controller (PAC). Optional PAC
write-protection is denoted by the "PAC Write-Protection" property in each individual register description.
For details, refer to the section on Synchronization.
Some registers are synchronized when read and/or written. Synchronization is denoted by the "Write-
Synchronized" or the "Read-Synchronized" property in each individual register description. For details,
refer to
Synchronization .
Some registers are enable-protected, meaning they can only be written when the peripheral is disabled.
Enable-protection is denoted by the "Enable-Protected" property in each individual register description.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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