21.8.3. Interrupt Flag Status and Clear
Name:
INTFLAG
Offset:
0x08
Reset:
0x00000000
Property:
-
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
DPLLLDRTO
DPLLLTO
DPLLLCKF
DPLLLCKR
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bit
15
14
13
12
11
10
9
8
DFLLRCS
DFLLLCKC
DFLLLCKF
DFLLOOB
DFLLRDY
Access
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OSC16MRDY
CLKFAIL
XOSCRDY
Access
R/W
R/W
R/W
Reset
0
0
0
Bit 19 – DPLLLDRTO: DPLL Loop Divider Ratio Update Complete
This flag is cleared by writing '1' to it.
This flag is set on 0-to-1 transition of the DPLL Loop Divider Ratio Update Complete bit in the Status
register (STATUS.DPLLLDRTO) and will generate an interrupt request if INTENSET.DPLLLDRTO is '1'.
Writing '0' to this bit has no effect.
Writing '1' to this bit clears the DPLL Loop Divider Ratio Update Complete interrupt flag.
Bit 18 – DPLLLTO: DPLL Lock Timeout
This flag is cleared by writing '1' to it.
This flag is set on 0-to-1 transition of the DPLL Lock Timeout bit in the Status register
(STATUS.DPLLLTO) and will generate an interrupt request if INTENSET.DPLLLTO is '1'.
Writing '0' to this bit has no effect.
Writing '1' to this bit clears the DPLL Lock Timeout interrupt flag.
Bit 17 – DPLLLCKF: DPLL Lock Fall
This flag is cleared by writing '1' to it.
This flag is set on 0-to-1 transition of the DPLL Lock Fall bit in the Status register (STATUS.DPLLLCKF)
and will generate an interrupt request if INTENSET.DPLLLCKF is '1'.
Writing '0' to this bit has no effect.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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