Atmel ATSAML22G16A-AUT, Manual

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16.8.3. Generator Control
GENCTRLn controls the settings of Generic Generator n (n=0..4).
Name: GENCTRLn
Offset: 0x20 + n*0x04 [n=0..4]
Reset: 0x00010005 for Generator n=0, else 0x00000000
Property:
PAC Write-Protection, Write-Synchronized
Bit 31 30 29 28 27 26 25 24
DIV[15:8]
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
DIV[7:0]
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
RUNSTDBY DIVSEL OE OOV IDC GENEN
Access
Reset
Bit 7 6 5 4 3 2 1 0
SRC[3:0]
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bits 31:16 – DIV[15:0]: Division Factor
These bits represent a division value for the corresponding Generator. The actual division factor is
dependent on the state of DIVSEL. The number of relevant DIV bits for each Generator can be seen in
this table. Written bits outside of the specified range will be ignored.
Table 16-3. Division Factor Bits
Generic Clock Generator Division Factor Bits
Generator 0 8 division factor bits - DIV[7:0]
Generator 1 16 division factor bits - DIV[15:0]
Generator 2 - 4 8 division factor bits - DIV[7:0]
Bit 13 – RUNSTDBY: Run in Standby
This bit is used to keep the Generator running in Standby as long as it is configured to output to a
dedicated GCLK_IO pin. If GENCTRLn.OE is zero, this bit has no effect and the generator will only be
running if a peripheral requires the clock.
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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