Atmel ATSAML22G16A-AUT, Manual

Page: 1149 / 1231

45.5. Maximum Clock Frequencies
Table 45-5. Maximum GCLK Generator Output Frequencies
Symbol Description F
max
[MHz] Units
PL0 PL2
F
gclkgen
[2:0] GCLK Generator output Frequency 24 96 MHz
F
gclkgen
[4:3] 16 66 MHz
Table 45-6. Maximum Peripheral Clock Frequencies
Symbol Description Max. Units
PL0 PL2
f
CPU
CPU clock frequency 8 32 MHz
f
AHB
AHB clock frequency 8 32 MHz
f
APBA
APBA clock frequency / Bus clock domain = BACKUP 8 8 MHz
f
APBA
APBA clock frequency / Bus clock domain = Low
Power 8 32 MHz
f
APBB
APBB clock frequency 8 32 MHz
f
APBC
APBC clock frequency 8 32 MHz
f
GCLK_DFLL48M_REF
DFLL48M Reference clock frequency NA 33 KHz
f
GCLK_DPLL
FDPLL96M Reference clock frequency 2 2 MHz
f
GCLK_DPLL_32K
FDPLL96M 32k Reference clock frequency 32 32 KHz
f
GCLK_EIC
EIC input clock frequency 12 48 MHz
f
GCLK_FREQM_MSR
FREQM Measure 12 48 MHz
f
GCLK_FREQM_REF
FREQM Reference 12 48 MHz
f
GCLK_USB
USB input clock frequency NA 48 MHz
f
GCLK_EVSYS_CHANNEL_0
EVSYS channel 0 input clock frequency 12 48 MHz
f
GCLK_EVSYS_CHANNEL_1
EVSYS channel 1 input clock frequency
f
GCLK_EVSYS_CHANNEL_2
EVSYS channel 2 input clock frequency
f
GCLK_EVSYS_CHANNEL_3
EVSYS channel 3 input clock frequency
f
GCLK_EVSYS_CHANNEL_4
EVSYS channel 4 input clock frequency
f
GCLK_EVSYS_CHANNEL_5
EVSYS channel 5 input clock frequency
f
GCLK_EVSYS_CHANNEL_6
EVSYS channel 6 input clock frequency
f
GCLK_EVSYS_CHANNEL_7
EVSYS channel 7 input clock frequency
f
GCLK_SERCOMx_SLOW
Common SERCOM slow input clock frequency 1 5 MHz
Atmel SAM L22G / L22J / L22N [DATASHEET]
Atmel-42402E-SAM L22G / L22J / L22N_Datasheet_Complete-07/2016
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