0
100
CrvSatn
B
C
×
- >
EQUATION1435 V1 EN
(Equation 129)
The highest phase (or phase-to-phase) voltage is always used for the inverse time delay
integration, see figure
. The details of the different inverse time characteristics are
ANSI05000016-2-en.vsd
Voltage
IDMT Voltage
Time
VA
VB
VC
ANSI05000016 V2 EN
Figure 257:
Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter
t1
and
t2
for definite time
mode (DT) and by selected voltage level dependent time curves for the inverse time
mode (TOV). If the PICKUP condition, with respect to the measured voltage ceases
during the delay time, and is not fulfilled again within a user defined reset time
(
tReset1
and
tReset2
for the definite time and
tIReset1
and
tIReset2
for the inverse
time) the corresponding PICKUP output is reset, after that the defined reset time has
elapsed. Here it should be noted that after leaving the hysteresis area, the PICKUP
condition must be fulfilled again and it is not sufficient for the signal to only return
back to the hysteresis area. The hysteresis value for each step is settable
(HystAbs2)
to
allow an high and accurate reset of the function. It should be noted that for Two step
overvoltage protection OV2PTOV (59) the TOV reset time is constant and does not
depend on the voltage fluctuations during the drop-off period. However, there are three
Section 8
1MRK505222-UUS C
Voltage protection
508
Technical reference manual
Summary of Contents for Relion 670 series
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