ABB Relion 670 series, Technical Reference Manual, Page: 1139 / 1232

TSU
PCI-Controller
ID-chip
MPPS
PPS
FPGA
PCI-bus
P
C
I-
co
n
P
C
I-
co
n
IO
-c
on
32 MHz
Registers
IRIG-
Decoder
Isolated
DC/DC
5 to +- 12V
S
T
-
co
n
ne
ct
or
Isolated
receiver
4 mm barrier
ZXING
IRIG_INPUT
OPTO_INPUT
Zero-cross
detector
Amplitude
modulator
B
N
C
-
co
n
ne
ct
or
CMPPS
Capture1
Capture2
en06000303.vsd
IEC06000303 V1 EN
Figure 543: IRIG-B block diagram
3
2
C
ST
A
1
Y2
D
C
//D
C
D
C
//D
C
O
O
C
T
A
1
C
C
en06000304.vsd
IEC06000304 V1 EN
Figure 544: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm
multimode fibre optic signal input and lower left BNC connector for IRIG-
B signal input
1MRK505222-UUS C
Section 19
IED hardware
1133
Technical reference manual