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20.3 Calculations
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・
The suffixes (i), (i+1), and (i+2) on the items indicate the channel
numbers being used. For example, when measuring with channels 1 and 2
in 3P3W mode, the voltages on the channels are indicated as "
U
1" and
"
U
2", and the SUM value as "
U
12."
・
U
(i),
I
(i), and
P
(i) for each channel are found by analog computation.
・
Values other than
U
(i),
I
(i), and
P
(i) are found by digital computation
from the measurement values
U
(i),
I
(i), and
P
(i), excluding the rounding
error of
±
1 dgt. in the displayed values.
The accuracy in this case is
±
1 dgt. with respect to the value computed
from the measurement values, and
±
3 dgt. for a SUM value.
・
The power factor and phase angle are computed from whichever of the
apparent power or reactive power expression is selected, and the values
may not always agree.
・
The lower-case "s
(i)
" at the beginning of the expressions for power factor
and phase angle indicates whether the current phase leads or lags the
voltage.
A "-" indicates that the current leads the voltage, and an unsigned
quantity that the current lags the voltage. The "su" indication is "-" when
the SUM value of the reactive power is negative, and "+" (but shown as
unsigned) when positive.
When type2 or type3 is selected for the expression for calculating the
apparent power and reactive power, the lead or lag polarity is not shown.
・
When under the influence of the measurement inaccuracy or an
unbalanced load
S
< |
P
|, the calculation is adjusted so that
S
= |
P
|,
Q
= 0,
λ
= 1, and
φ
= 0.
・
In the DC mode, P is measured as the sum of AC and DC values, and
therefore it may be the case that
S
< |
P
|.
・
When calculation "TYPE1" is selected and averaging (time averaging/
sliding averaging/ exponential averaging) is carried out, the polarity "si"
and "su" for each channel are calculated as "+1".
Summary of Contents for Power HiTester 3193
Page 2: ......
Page 50: ...32 3 9 Operations During Power Failure ...
Page 76: ...58 4 13 Degaussing ...
Page 80: ...62 5 2 Setting the Frequency Range fa ...
Page 108: ...90 9 3 Internal Circuit for the External Control and Timing ...
Page 112: ...94 10 3 Output Rate ...
Page 250: ...232 13 9 Error and Overflow Displays ...
Page 278: ...260 17 5 Internal Block Diagram ...
Page 284: ...266 19 2 Installation Procedures For JIS standard For EIA standard External Dimensions ...
Page 300: ...282 20 4 Internal Block Diagram of the 3193 ...
Page 306: ...INDEX 4 Index ...
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