131
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*CLS
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Syntax
*CLS
Syntax
*ESE
<NR1>
<NR1> = 0 to 255
Example
Transmission
*ESE 48
Bits 5 and 4 of SESER are set to 48.
32+16=48
Syntax
*ESE?
Response
syntax
(Headers: ON) (Headers: OFF)
*ESE
<NR1> <NR1>
Example
Transmission
Response
*ESE?
*ESE 36
36
The data format is same as *ESE
Function
This instruction clears the event registers
and the bits of the status byte register
associated with that register (ESR, ESR0,
ESR1, ESR2, ESR[ch], ESRF).
Note
This has no effect upon the output queue,
the various enable registers, or bit 4 (the
MAV bit) of the status byte register.
Function
Sets the mask pattern of the standard
event status enable register (SESER) to a
value (0 to 255).
128
64
32
16
8
4
2
1
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
PON URQ CME EXE
DDE QYE RQC OPC
Note
When the power is turned on, and when a
reset has taken place upon key input, the
data is reinitialized to 0.
Error
Execution error / If the setting data is out
of the range.
Function
The contents of SESER as set by the
*
ESE command are returned as a NR1
value (0 to 255).
Note
If any error occurs, no response message
to this query is produced.
Error
Query error / If the response message is
longer than 2000 bytes
12.4.1 Standard Command
*CLS
Clears the status byte register and the event registers.
*ESE
Sets the standard event status enable register.
*ESE?
Queries the standard event status enable register (SESER).
Summary of Contents for Power HiTester 3193
Page 2: ......
Page 50: ...32 3 9 Operations During Power Failure ...
Page 76: ...58 4 13 Degaussing ...
Page 80: ...62 5 2 Setting the Frequency Range fa ...
Page 108: ...90 9 3 Internal Circuit for the External Control and Timing ...
Page 112: ...94 10 3 Output Rate ...
Page 250: ...232 13 9 Error and Overflow Displays ...
Page 278: ...260 17 5 Internal Block Diagram ...
Page 284: ...266 19 2 Installation Procedures For JIS standard For EIA standard External Dimensions ...
Page 300: ...282 20 4 Internal Block Diagram of the 3193 ...
Page 306: ...INDEX 4 Index ...
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