Hioki Power HiTester 3193, Instruction Manual

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12.3 Interface Outline
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Standard event status register (SESR) bit assignments
Bit 7
PON
Power on flag.
When the power is turned on, or on recovery from a power cut,
this bit is set to 1.
Bit 6
URQ
User request.
Not used by the 3193.
Bit 5
CME
Command error.
When a command which has been received contains a syntactic or
semantic error, this bit is set to 1.
・
There is a mistake in a program header.
・
The number of data parameters is wrong.
・
The format of t he pa ramete rs is wrong.
Bit 4
EXE
Execution error.
When for some reason a command which has been received
cannot be executed, this bit is set to 1.
・ The designated data value is outside the set range.
・
The designated data value is not acceptable.
・ Some other function is being performed (during holding and
integrating).
Bit 3
DDE
Device dependent error.
When a command cannot be executed due to some cause other
than a command error, a query error, or an execution error, this
bit is set to 1.
・
Execution is impossible due to an abnormality inside the 3193.
Bit 2
QYE
Query error.
This bit is set to 1 when a query error is detected by the output
queue control.
・
When an attempt has been made to read the output queue when
it is empty.
・
When the data overflows the output queue.
・ When data in the output queue has been lost.
Bit 1
RQC
Request for controller authority.
Not used by the 3193.
Bit 0
OPC
Operation terminated.
This bit is set to 1 when an "*OPC" command is executed, when
the operation of all the messages up to the "*OPC" command has
been completed.
(2) Standard event status enable register (SESER)
Setting any bit of the standard event status enable register to 1 enables the
corresponding bit of the standard event status register to be accessed.