Device Security
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SLAU356I – March 2015 – Revised June 2019
Copyright © 2015–2019, Texas Instruments Incorporated
System Controller A (SYSCTL_A)
If the CPU execution enters an IP protected secure memory zone, the security control mechanism alerts
the SYSCTL_A module, after which all debugger (JTAG or SWD) accesses into the debug AHB-AP port of
the CPU are disabled. In addition, SYSCTL_A prevents the CPU from halting inside a secure zone to
prevent a possible security hole, or a device lock-up condition (halted device unable to restart). This
feature also enables code within secure zones to use the internal SRAM for temporary storage of critical
or proprietary data. As long as the CPU is executing from within the secure zone, the full device (and
hence the SRAM) is inaccessible to unauthorized external mechanisms. It is the responsibility of the
secure code to ensure that critical data is erased from the SRAM before control is handed back to
nonsecure zones (thus unlocking the device to subsequent debugger accesses).
The SYSCTL_A security control mechanism monitors accesses from the debugger in the DAP (debug)
port of the CPU and selectively allows, filters, or blocks those accesses if debug security is active. Debug
security is typically active in one of two conditions:
•
The device is in JTAG and SWD lock mode.
•
The device has IP protection enabled, and the CPU is currently executing in one of the defined secure
memory zone
Under debug security active condition, SYSCTL_A also does not permit the CPU to halt. Ideally,
preventing any debugger accesses should also prevent halt conditions, but malicious software may be
able to enable breakpoint addresses that point into secure memory zones and, thereby cause a halt when
the CPU is executing secure code.
When debug security is inactive, all debugger accesses are allowed to pass through to the DAP port of
the CPU.
5.8.4.2
IP Protection and Secure Zone Data Access Unlock Register
To provide an extra layer of security for sensitive data content in memory, the IP protection control can be
configured to enable the data access locking feature of the device security infrastructure. If data access
locking is enabled, even secure code cannot access data from within its own secure zone. This data
access locking is achieved through the SEC_ZONEx_DATA_EN fields in the flash boot-override mailbox
(FL_BOOTOVER_MAILBOX).
If the data access lock is disabled, the secure code is permitted to access data from within its own secure
zone. However, this needs an additional step in which secure code first must explicitly request unlock of
data accesses to its own zone. This unlocking is done using the Secure Zone Data Unlock
(SYS_SECDATA_UNLOCK) register. Unlock commands to the SYS_SECDATA_UNLOCK register are
honored only if the following conditions are satisfied:
•
The IP protected secure zone data enable (SEC_ZONEx_DATA_EN) field in the boot-override mailbox
is set to enable (0x00000000) when the secure zone is set up.
•
The code writing to the data unlock register (and thereby requesting for data accesses to a secure
zone) lies within the same secure zone.
•
Writes to the data unlock register use the appropriate unlock key as defined in the register's bit
description
When a secure zone is unlocked for data, data accesses to that zone is still permitted only for code
executing from within the same zone.
