Clock System Introduction
379
SLAU356I – March 2015 – Revised June 2019
Copyright © 2015–2019, Texas Instruments Incorporated
Clock System (CS)
6.1
Clock System Introduction
The clock system module supports low system cost and low power consumption. The clock module can
be configured to operate without any external components, with up to two external crystals, or with
resonators, or with an external resistor under full software control.
The clock system module includes the following clock resources:
•
LFXTCLK: Low-frequency oscillator (LFXT) that can be used either with low-frequency 32768-Hz watch
crystals, standard crystals, resonators, or external clock sources in the 32-kHz or below range. When
in bypass mode, LFXTCLK can be driven with an external square wave signal in the 32-kHz or below
range.
•
HFXTCLK: High-frequency oscillator (HFXT) that can be used with standard crystals or resonators in
the 1-MHz to 48-MHz range. When in bypass mode, HFXTCLK can be driven with an external square
wave signal.
•
DCOCLK: Internal digitally controlled oscillator (DCO) with programmable frequencies and 3-MHz
frequency by default
•
VLOCLK: Internal very-low-power low-frequency oscillator (VLO) with 9.4-kHz typical frequency
•
REFOCLK : Internal, low-power low-frequency oscillator (REFO) with selectable 32.768-kHz or 128-
kHz typical frequencies
•
MODCLK: Internal low-power oscillator with 25-MHz typical frequency
•
SYSOSC: Internal oscillator with 5-MHz typical frequency
Five primary system clock signals are available from the clock module:
•
ACLK: Auxiliary clock. ACLK is software selectable as LFXTCLK, VLOCLK, or REFOCLK. ACLK can
be divided by 1, 2, 4, 8, 16, 32, 64, or 128. ACLK is software selectable by individual peripheral
modules. ACLK is restricted to maximum frequency of operation of 128 kHz.
•
MCLK: Master clock. MCLK is software selectable as LFXTCLK, VLOCLK, REFOCLK, DCOCLK,
MODCLK, or HFXTCLK. MCLK can be divided by 1, 2, 4, 8, 16, 32, 64, or 128. MCLK is used by the
CPU and peripheral module interfaces, as well as, used directly by some peripheral modules.
•
HSMCLK: Subsystem master clock. HSMCLK is software selectable as LFXTCLK, VLOCLK,
REFOCLK, DCOCLK, MODCLK, HFXTCLK. HSMCLK can be divided by 1, 2, 4, 8, 16, 32, 64, or 128.
HSMCLK is software selectable by individual peripheral modules.
•
SMCLK: Low-speed subsystem master clock. SMCLK uses the HSMCLK clock resource selection for
its clock resource. SMCLK can be divided independently from HSMCLK by 1, 2, 4, 8, 16, 32, 64, or
128. SMCLK is limited in frequency to half of the rated maximum frequency of HSMCLK. SMCLK is
software selectable by individual peripheral modules.
•
BCLK: Low-speed backup domain clock. BCLK is software selectable as LFXTCLK and REFOCLK and
is used primarily in the backup domain. BCLK is restricted to a maximum frequency of 32.768 kHz.
VLOCLK, REFOCLK, LFXTCLK, MODCLK, and SYSCLK are additional system clock signals from the
clock module. Some of these are not only available as resources to the various system clocks but may
also be used directly by various peripheral modules.
