Texas Instruments SimpleLink MSP432P4 Series, Technical Reference Manual

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DMA Operation
643 SLAU356I – March 2015 – Revised June 2019
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Copyright © 2015–2019, Texas Instruments Incorporated
DMA
Table 11-10. Permitted Base Addresses (continued)
Number of
DMA Channels
Permitted Base Addresses
(1)
for the Primary Data Structure
17-32 0xXXXXX000, 0xXXXXX400, 0xXXXXX800, 0xXXXXXC00
The controller uses the system memory to enable it to access two pointers and the control information that
it requires for each channel. The following subsections describe these 32-bit memory locations and how
the controller calculates the DMA transfer address:
• Source data end pointer (see Section 11.2.4.1 )
• Destination data end pointer (see Section 11.2.4.2 )
• Control data configuration (see Section 11.2.4.3 )
• Address calculation (see Section 11.2.4.4 )
11.2.4.1 Source Data End Pointer
The src_data_end_ptr memory location contains a pointer to the end address of the source data.
Table 11-11 lists the bit assignments for this memory location.
Table 11-11. rc_data_end_ptr Bit Assignments
Bit Name Description
[31:0] src_data_end_ptr Pointer to the end address of the source data
Before the controller can perform a DMA transfer, program this memory location with the end address of
the source data. The controller reads this memory location when it starts a 2
R
DMA transfer.
11.2.4.2 Destination Data End Pointer
The dst_data_end_ptr memory location contains a pointer to the end address of the destination data.
Table 11-12 lists the bit assignments for this memory location.
Table 11-12. dst_data_end_ptr Bit Assignments
Bit Name Description
[31:0] dst_data_end_ptr Pointer to the end address of the destination data
Before the controller can perform a DMA transfer, program this memory location with the end address of
the destination data. The controller reads this memory location when it starts a 2
R
DMA transfer.
11.2.4.3 Control Data Configuration
For each DMA transfer, the channel_cfg memory location provides the control information for the
controller.
Section 11.2.4.3 shows the bit assignments for this memory location.
Figure 11-10. channel_cfg Bit Assignments
Table 11-13 lists the bit assignments for this memory location.