Texas Instruments SimpleLink MSP432P4 Series, Technical Reference Manual

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Functional Peripherals Registers
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172 SLAU356I – March 2015 – Revised June 2019
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Cortex-M4F Peripherals
2.4.6.2 ACTLR Register (Offset = 8h) [reset = 00000000h]
ACTLR is shown in Figure 2-82 and described in Table 2-91 .
Auxiliary Control Register. Use the Auxiliary Control Register to disable certain aspects of functionality
within the processor
Figure 2-82. ACTLR Register
31 30 29 28 27 26 25 24
RESERVED
R/W-0h
23 22 21 20 19 18 17 16
RESERVED
R/W-0h
15 14 13 12 11 10 9 8
RESERVED DISOOFP DISFPCA
R/W-0h R/W-0h R/W-0h
7 6 5 4 3 2 1 0
RESERVED DISFOLD DISDEFWBUF DISMCYCINT
R/W-0h R/W-0h R/W-0h R/W-0h
Table 2-91. ACTLR Register Field Descriptions
Bit Field Type Reset Description
31-10 RESERVED R/W 0h Reserved
9 DISOOFP R/W 0h Disables floating point instructions completing out of order with
respect to integer instructions.
8 DISFPCA R/W 0h Disables automatic update of CONTROL.FPCA.
7-3 RESERVED R/W 0h Reserved
2 DISFOLD R/W 0h
Disables IT folding.
1 DISDEFWBUF R/W 0h
Disables write buffer us during default memory map accesses. This
causes all bus faults to be precise bus faults but decreases the
performance of the processor because the stores to memory have to
complete before the next instruction can be executed.
0 DISMCYCINT R/W 0h
Disables interruption of multi-cycle instructions. This increases the
interrupt latency of the processor because LDM/STM completes
before interrupt stacking occurs.