Texas Instruments SimpleLink MSP432P4 Series, Technical Reference Manual

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Debug Peripherals Registers
217 SLAU356I – March 2015 – Revised June 2019
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Cortex-M4F Peripherals
2.5.3 ITM Registers
Table 2-129 lists the memory-mapped registers for the ITM. All register offset addresses not listed in
Table 2-129 should be considered as reserved locations and the register contents should not be modified.
Table 2-129. ITM Registers
Offset Acronym Register Name Type Reset Section
0h STIM0 ITM Stimulus Port 0 read-write Undefined Section 2.5.3.1
4h STIM1 ITM Stimulus Port 1 read-write Undefined Section 2.5.3.2
8h STIM2 ITM Stimulus Port 2 read-write Undefined Section 2.5.3.3
Ch STIM3 ITM Stimulus Port 3 read-write Undefined Section 2.5.3.4
10h STIM4 ITM Stimulus Port 4 read-write Undefined Section 2.5.3.5
14h STIM5 ITM Stimulus Port 5 read-write Undefined Section 2.5.3.6
18h STIM6 ITM Stimulus Port 6 read-write Undefined Section 2.5.3.7
1Ch STIM7 ITM Stimulus Port 7 read-write Undefined Section 2.5.3.8
20h STIM8 ITM Stimulus Port 8 read-write Undefined Section 2.5.3.9
24h STIM9 ITM Stimulus Port 9 read-write Undefined Section 2.5.3.10
28h STIM10 ITM Stimulus Port 10 read-write Undefined Section 2.5.3.11
2Ch STIM11 ITM Stimulus Port 11 read-write Undefined Section 2.5.3.12
30h STIM12 ITM Stimulus Port 12 read-write Undefined Section 2.5.3.13
34h STIM13 ITM Stimulus Port 13 read-write Undefined Section 2.5.3.14
38h STIM14 ITM Stimulus Port 14 read-write Undefined Section 2.5.3.15
3Ch STIM15 ITM Stimulus Port 15 read-write Undefined Section 2.5.3.16
40h STIM16 ITM Stimulus Port 16 read-write Undefined Section 2.5.3.17
44h STIM17 ITM Stimulus Port 17 read-write Undefined Section 2.5.3.18
48h STIM18 ITM Stimulus Port 18 read-write Undefined Section 2.5.3.19
4Ch STIM19 ITM Stimulus Port 19 read-write Undefined Section 2.5.3.20
50h STIM20 ITM Stimulus Port 20 read-write Undefined Section 2.5.3.21
54h STIM21 ITM Stimulus Port 21 read-write Undefined Section 2.5.3.22
58h STIM22 ITM Stimulus Port 22 read-write Undefined Section 2.5.3.23
5Ch STIM23 ITM Stimulus Port 23 read-write Undefined Section 2.5.3.24
60h STIM24 ITM Stimulus Port 24 read-write Undefined Section 2.5.3.25
64h STIM25 ITM Stimulus Port 25 read-write Undefined Section 2.5.3.26
68h STIM26 ITM Stimulus Port 26 read-write Undefined Section 2.5.3.27
6Ch STIM27 ITM Stimulus Port 27 read-write Undefined Section 2.5.3.28
70h STIM28 ITM Stimulus Port 28 read-write Undefined Section 2.5.3.29
74h STIM29 ITM Stimulus Port 29 read-write Undefined Section 2.5.3.30
78h STIM30 ITM Stimulus Port 30 read-write Undefined Section 2.5.3.31
7Ch STIM31 ITM Stimulus Port 31 read-write Undefined Section 2.5.3.32
E00h TER ITM Trace Enable Register read-write 00000000h Section 2.5.3.33
E40h TPR ITM Trace Privilege Register read-write 00000000h Section 2.5.3.34
E80h TCR ITM Trace Control Register read-write 00000000h Section 2.5.3.35
EF8h IWR ITM Integration Write Register write-only 00000000h Section 2.5.3.36
F00h IMCR ITM Integration Mode Control Register read-write 00000000h Section 2.5.3.37
FB0h LAR ITM Lock Access Register write-only 00000000h Section 2.5.3.38
FB4h LSR ITM Lock Status Register read-only 00000003h Section 2.5.3.39