Texas Instruments SimpleLink MSP432P4 Series, Technical Reference Manual

Page: 730 / 1053

in[3]
in[2]
in[1]
in[0]
in[7]
in[6]
in[5]
in[4]
in[11]
in[10]
in[9]
in[8]
in[15]
in[14]
in[13]
in[12]
s[3,0]
s[2,0]
s[1,0]
s[0,0]
s[3,1]
s[2,1]
s[1,1]
s[0,1]
s[3,2]
s[2,2]
s[1,2]
s[0,2]
s[3,3]
s[2,3]
s[1,3]
s[0,3]
Input bytes State array Output bytes
out[3]
out[2]
out[1]
out[0]
out[7]
out[6]
out[5]
out[4]
out[11]
out[10]
out[9]
out[8]
out[15]
out[14]
out[13]
out[12]
AES Accelerator Operation
www.ti.com
730 SLAU356I – March 2015 – Revised June 2019
Submit Documentation Feedback
Copyright © 2015–2019, Texas Instruments Incorporated
AES256 Accelerator
16.2 AES Accelerator Operation
The AES accelerator is configured with user software. The bit AESKLx determines if AES128, AES192, or
AES256 is going to be performed. There are four different operation modes available, selectable by the
AESOPx bits (see
Table 16-1 ).
Table 16-1. AES Operation Modes Overview
AESOPx AESKLx Operation Clock Cycles
00
00 AES128 encryption 168
01 AES192 encryption 204
10 AES256 encryption 234
01
00 AES128 decryption (with initial roundkey) is performed 215
01 AES192 decryption (with initial roundkey) is performed 255
10 AES256 decryption (with initial roundkey) is performed 292
10
00 AES128 encryption key schedule is performed 53
01 AES192 encryption key schedule is performed 57
10 AES256 encryption key schedule is performed 68
11
00 AES128 (with last roundkey) decryption is performed 168
01 AES192 (with last roundkey) decryption is performed 206
10 AES256 (with last roundkey) decryption is performed 234
Table 16-1 lists the execution time of the different modes of operation. While the AES module is operating,
the AESBUSY bit is 1. As soon as the operation has finished, the AESRDYIFG bit is set.
Internally, the AES algorithm's operations are performed on a two-dimensional array of bytes called the
State. The State consists of four rows of bytes, each containing four bytes, independently if AES128,
AES192, or AES256 is performed.
Figure 16-2 shows how the input is assigned to the State array, with
in[0] being the first data byte written into one of the AES accelerators input registers (AESADIN,
AESAXDIN, and AESAXIN). The encrypt or decrypt operations are then conducted on the State array,
after which its final values can be read from the output with out[0] being the first data byte read from the
AES accelerator data output register (AESADOUT).
Figure 16-2. AES State Array Input and Output
If an encryption is to be performed, the initial state is called plaintext. If a decryption is to be performed,
the initial state is called ciphertext.
The module allows half-word and byte access to all data registers—AESAKEY, AESADIN, AESAXDIN,
AESAXIN, and AESADOUT. Half-word and byte access cannot be mixed while reading from or writing into
one of the registers. However, it is possible to write one of the registers using byte access and another
using half-word access.