eUSCI_B Operation – I
2
C Mode
974
SLAU356I – March 2015 – Revised June 2019
Copyright © 2015–2019, Texas Instruments Incorporated
Enhanced Universal Serial Communication Interface (eUSCI) – I
2
C Mode
26.3.7.2 Automatic STOP Generation
When the eUSCI_B module is configured as a master, the byte counter can be used for automatic STOP
generation by setting the UCASTPx = 10. Before starting the transmission using UCTXSTT, the byte
counter threshold UCBxTBCNT must be set to the number of bytes that are to be transmitted or received.
After the number of bytes that are configured in UCBxTBCNT have been transmitted, the eUSCI_B
automatically generates a STOP condition.
UCBxTBCNT cannot be used if the user wants to transmit the slave address only without any data. In this
case, TI recommends setting UCTXSTT and UCTXSTP at the same time.
26.3.8 Multiple Slave Addresses
The eUSCI_B module supports two different ways of implementing multiple slave addresses at the same
time:
•
Hardware support for up to 4 different slave addresses, each with its own interrupt flag and DMA
trigger
•
Software support for up to 2
10
different slave addresses all sharing one interrupt
26.3.8.1 Multiple Slave Address Registers
The registers UCBxI2COA0, UCBxI2COA1, UCBxI2COA2, and UCBxI2COA3 contain four slave
addresses. Up to four address registers are compared against a received 7- or 10-bit address. Each slave
address must be activated by setting the UCOAEN bit in the corresponding UCBxI2COAx register.
Register UCBxI2COA3 has the highest priority if the address received on the bus matches more than one
of the slave address registers. The priority decreases with the index number of the address register, so
that UCBxI2COA0 in combination with the address mask has the lowest priority.
When one of the slave registers matches the 7- or 10-bit address seen on the bus, the address is
acknowledged. In the following the corresponding receive- or transmit-interrupt flag (UCTXIFGx or
UCRXIFGx) to the received address is updated. The state change interrupt flags are independent of the
address comparison result. They are updated according to the bus condition.
26.3.8.2 Address Mask Register
The Address Mask Register can be used when the eUSCI_B is configured in slave or in multiple-master
mode. To activate this feature, at least one bit of the address mask in register UCBxADDMASK must be
cleared.
If the received address matches the own address in UCBxI2COA0 on all bit positions not masked by
UCBxADDMASK the eUSCI_B considers the seen address as its own address and sends an
acknowledge. The user has the choice to either automatically acknowledge the address seen on the bus
or to evaluate this address and send the acknowledge in software using UCTXACK. The selection
between these options is done using the UCSWACK bit. If the software is used for generation of the ACK
of the slave address, TI recommends using the UCSTTIFG. The received address can be found in the
UCBxADDRX register.
A slave address seen on the bus is automatically acknowledged by the eUSCI_B module, if it matches
any of the slave addresses defined in UCBxI2COA1 to UCBxI2COA3.
NOTE:
UCSWACK and slave-transmitter
If the user selects manual acknowledge of slave addresses, the TXIFG is set if the slave is
addressed as a transmitter. If the user decides not to acknowledge the address, the TXIFG
also must be reset.
