Functional Peripherals Registers
148
SLAU356I – March 2015 – Revised June 2019
Copyright © 2015–2019, Texas Instruments Incorporated
Cortex-M4F Peripherals
Table 2-68. SHCSR Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
10
PENDSVACT
R
0h
PendSV active flag.
0b (R/W) = not active
1b (R/W) = active
9
RESERVED
R/W
0h
8
MONITORACT
R
0h
the Monitor active flag.
0b (R/W) = not active
1b (R/W) = active
7
SVCALLACT
R
0h
SVCall active flag.
0b (R/W) = not active
1b (R/W) = active
6-4
RESERVED
R/W
0h
3
USGFAULTACT
R
0h
UsageFault active flag.
0b (R/W) = not active
1b (R/W) = active
2
RESERVED
R/W
0h
1
BUSFAULTACT
R
0h
BusFault active flag.
0b (R/W) = not active
1b (R/W) = active
0
MEMFAULTACT
R
0h
MemManage active flag.
0b (R/W) = not active
1b (R/W) = active