CHAPTER 13 A/D CONVERTER
User’s Manual U16896EJ2V0UD
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13.3 Configuration
The A/D converter consists of the following hardware.
Figure 13-1. Block Diagram of A/D Converter
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
AV
REF0
AV
SS
INTAD
ADCS bit
3
ADS2 ADS1 ADS0
EGA1 EGA0 TRG ADTMD
FR0 ADHS1 ADHS0 ADCS2
ADCS ADMD FR2 FR1
Sample & hold circuit
AV
SS
Voltage comparator
Controller
Edge
detector
ADTRG
INTTM010
ADCR/ADCRH
register
PFT
register
ADS register
ADM register
PFEN PFCM
PFM
register
Internal bus
SAR register
Comparator
Tap selector
Selector
Selector
Table 13-1. Registers of A/D Converter Used by Software
Item Configuration
Registers
A/D conversion result register (ADCR)
A/D conversion result register H (ADCRH): Only higher 8 bits can be read
Power fail comparison threshold register (PFT)
A/D converter mode register (ADM)
Analog input channel specification register (ADS)
Power fail comparison mode register (PFM)