Toshiba TMPR4925, Руководство пользователя

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Chapter 3 Signals
3-10
Table 3.1.14 Extended EJTAG Interface Signals (2/2)
Signal Name Type Description Initial State
TPC[3:1] Output PC Trace Output
TPC[3:1] output the value of the noncontiguous program counter in sync with DCLK.
The pins are shared with other functions (refer to Section "3.3 Pin Multiplexing").
Selected by
TDO
H: PIO input
L: All High
TMS Input
PU
JTAG Test Mode Select Input
TMS mainly controls state transition in the TAP controller state machine.
Input
TRST
*
Input Test Reset Input
Asynchronous reset input for the TAP controller and debug support unit (DSU).
This pin must be pulled down to Low. (ex. 10 k
Ω
)
When this signal is deasserted, G-Bus timeout detection is disabled (refer to Section
“5.1.1 Detecting G-Bus Timeout”).
Input
DCLK Output Debug Clock
Clock output signal for the real-time debugging system.
When PC trace mode is selected, the TPC[3:1] and PCST signals are output
synchronously. This clock is the TX49/H2 core operating clock (CPUCLK) divided by
3.
The pin is shared with other functions (refer to Section "3.3 Pin Multiplexing").
Selected by
TDO
H: PIO input
L: Low
PCST[8:0] Output PC Trace Status Information
Outputs PC trace status and other information.
The pins are shared with other functions (refer to Section "3.3 Pin Multiplexing").
Selected by
TDO
H: PIO input
(PCST[8:1])
BC32K(PC
ST[0])
L: All Low
3.1.15 Clock Signals
Table 3.1.15 Clock Signals
Signal Name Type Description Initial State
MASTERCLK Input Master Clock
Input pin for the TX4925 operating clock. A crystal resonator cannot be connected to
this pin because the pin does not contain an oscillator.
Input
C32KIN Input 32 KHz Crystal Input
Connect this pin and C32KOUT to a 32.768 kHz crystal.
Input
C32KOUT Output 32 KHz Crystal output
Connect this pin and C32KIN to a 32.768 kHz crystal.
Output
BC32K Output
PU
Buffer output of 32 KHz Crystal
Buffer output for a 32.768 kHz clock.
Selected by
TDO
H: Output
(BC32K)
L: Low
3.1.16 Initialization Signals
Table 3.1.16 Initialization Signals
Signal Name Type Description Initial State
RESET * Input
SMT
Reset
Reset signal.
Input
PON
*
Input
SMT
Power On Reset
Initializes the CG. For timing, refer to Section "6.3 Power-On Sequence".
Input