MAX32600 User’s Guide
Analog Front End
8.4 DAC
Setting the DAC Start Mode
The final parameter that must be written to configure the DAC instance is the DAC Start Mode. This setting determines when the DAC will begin generating output
voltage data according to the specified settings, based on the voltage samples loaded in the DAC FIFO. To set this parameter, write to the
field; the options are as follows:
•
Start when the FIFO Is Not Empty (00b)
– In this mode, the DAC will begin generating output voltages as soon as there is data available in the FIFO for it to
read.
•
Start on DAC Generated Start Strobe (10b)
– In this mode, the DAC output sequence is started by writing the
bit to 1.
•
Start on ADC Generated Start Strobe (01b)
– In this mode, a common start signal from the ADC (which is issued when the ADC begins to convert samples)
is used to trigger the start of the DAC output pattern. This mode should be used when it is necessary to synchronize the start of the DAC output pattern to the
start of ADC sample collection, or to synchronize the outputs of two or more DAC instances.
8.4.3.3
DAC Voltage Generation
8.4.3.3.1
Generating DAC Static Voltage Output
To generate a static voltage output with the DAC (which can be changed at any time by loading a new output voltage value), the DAC must be set to the mode “Output
New Values from FIFO When Available” by writing 00b to
. With this mode enabled, whenever a sample value is loaded into the DAC FIFO,
the DAC will immediately pull the sample value, set the output voltage statically to that value, and then hold that value until a new sample is loaded into the DAC
FIFO.
Note
When using this mode, the Rate Count and Interpolation Mode parameters do not apply.
After setting the DAC operating mode as described above, the voltage value can be loaded to the FIFO by writing the desired sample output code to the
address location as follows:
• For an 8-bit DAC instance, the value should be written as a byte (8-bit) write; no padding is needed.
• For a 12-bit DAC instance, the value should be written as a word (16-bit) write. The code value should be MSB aligned (shifted upwards four bits) to occupy
the highest 12 bits of the 16-bit word. The lowest four bits of the 16-bit word should be padded to zeroes.
8.4.3.3.2
Generating DAC Dynamic Voltage Output
To generate a dynamic voltage output sequence from the DAC (where voltage output values are generated based on sample code values pulled from the DAC FIFO),
the DAC operating mode should be set to one of the following two options by writing to
Rev.1.3 April 2015
Maxim Integrated
Page 459
Содержание MAX32600
Страница 1: ...MAX32600 User s Guide April 2015...
